目录
机制裁决第 147 篇 · 对称双向第 142 篇 · section B1 · 全库第 205 篇 本篇审的是「3nm 芯片」这句话。先读三句红线：
- 本篇不裁决任何半导体产业政策、公司投资决策或地缘竞争的是非，不评价任何公司或个人的动机——只审这句话从文件里读出来时承重承不承得住。涉及商业利益，只登记公开披露的事实，不推断因果。
- 「名号与实物有差价」与「实物是假的」是两件不同的事。本篇的裁决主要落在前者：没有发现 3nm 工艺进步是假的，发现的是「3nm」这个名号与芯片物理特征尺寸之间的差价，被传播链当成同一个东西用。
- 全篇承重句均给出可点击来源；英文逐字引用一律标注取回方式。本篇引用的所有数字（密度增益、栅极间距、良率、收入占比、量产日期、节点命名）都给出出处，自算部分先复现官方数字校验算法、通过后才使用，算式写进正文，可复现。
零、一句话裁决
「3nm 芯片」这句话里，「芯片」是真的，「nm」是代号，「3」是营销档位——三者被读成一句话时，像是说芯片里有什么东西是 3 纳米宽的；而没有任何一家代工厂的 3nm 工艺，栅极间距、鳍距、金属间距或任何物理特征尺寸是 3 纳米。
2022 年 6 月 30 日三星宣布逐字「Samsung Electronics…today announced that it has started initial production of its 3-nanometer (nm) process node applying Gate-All-Around (GAA) transistor architecture」[一手逐字]；2022 年 12 月 29 日台积电宣布逐字「3nm technology has successfully entered volume production with good yields」[一手逐字]，并在同一份官方文件里给出真数字逐字「Compared with the 5nm (N5) process, TSMC’s 3nm process offers up to 1.6X logic density gain and 30-35% power reduction at the same speed」[一手逐字]——两家都从没说「有东西是 3 纳米」。物理账摆在那里：台积电 N3 的接触栅极间距（CPP）45 纳米、三星 3GAE 的 40 纳米、英特尔 Intel 3 的 50 纳米（[一手逐字]，见第五章对比表）——名号比实物小了一个数量级。而「名号不是尺寸」这件事，是官方自己承认的：英特尔 2021 年官方新闻稿逐字「The industry has long recognized that traditional nanometer-based process node naming stopped matching the actual gate-length metric in 1997」[一手逐字]；台积电研究院副院长 Philip Wong 2019 年在 Hot Chips 大会原话逐字「Today, these numbers are just numbers. They’re like models in a car – it’s like BMW 5-series or Mazda 6」[一手逐字]——承认句全在官方文件里，差价不是外人揭发的，是行业自己写下的。
而「3nm 芯片」在传播链里的用法是「全世界最先进的芯片」——这个读法被三家各自的「第一」措辞分别合法化了一半：三星称「the world’s first 3nm process with the MBCFET™」[一手逐字]、台积电称「the most advanced semiconductor technology in both power, performance, and area (PPA)」[一手逐字]、苹果称 A17 Pro「the industry’s first 3-nanometer chip」[一手逐字]——合法化的是「先进/第一」的档位，不是「3 纳米」的尺寸。
本篇的独占格在第四、七章：名号的谱系（1972-1995 年名实相符的 23 年、1997 分水岭、营销时代的数字漂移、2021 改名运动）、兑现的时间线（2022 宣布量产 → 台积电 3nm 收入占比 2023 全年 6% → 2024 全年 18% → 2025 全年 24% 的官方爬坡账[一手逐字]、三星良率传闻链与客户账、英伟达 RTX 50 系列明确不是 3nm 的裁决点[一手逐字]），以及反向四句的审计（「摩尔定律已死」「3nm 是纯营销骗局」「中国已超越台积电」「英特尔已出局」——四句全部不立，且每一句的不立证据里都有官方文件）。
灵魂句：3nm 从来没有指过任何 3 纳米的东西——它一直是一个档位代号；真正发生过的 3 纳米，是它作为「最先进」的代号在传播链里被兑换成的那句完成时。
一、本篇测什么
1.1 被审对象
被审的是一句话及其用法：
- 厂商句：三星「3nm process with GAA architecture」（官方新闻稿，2022-06-30）、台积电「N3 (3nm) process」（官方新闻稿，2022-12-29）、苹果「A17 Pro, the industry’s first 3-nanometer chip」（官方新闻稿，2023-09-12）；
- 媒体句：2022-2026 年「全球首颗 3nm 芯片」「3nm 时代来了」「突破 3nm 制程」类标题（样本见第九章）。
1.2 结构胎记
名号跳 × 归属跳 × 兑现跳 ＋ 反向红跳。
- 名号跳：把「工艺节点代号（3nm）」读成「物理特征尺寸（3 纳米）」——节点命名的历史：物理尺寸时代（1972-1995，节点名≈沟道长度）→ 营销时代（1997 年起脱钩，EEJournal 逐字「the node name has not been a representation of any actual dimension on the chip, and it has erred in both directions by almost a factor of 2」[一手逐字]）→ 改名运动（英特尔 2021 弃用 nm 命名，官方逐字「creating a clear and consistent framework to give customers a more accurate view of process nodes」[一手逐字]）。
- 归属跳：把「发布了 3nm 工艺/首发 3nm 量产」读成「全球最先进/领先一代」——三星「the first to do so globally」（Reuters 逐字）vs 台积电「most advanced semiconductor technology in both PPA and transistor technology」（官方逐字）vs 苹果「industry’s first 3-nanometer chip」（官方逐字）——「首发」与「最先进」被当成同一件事。
- 兑现跳：把「2022 年宣布量产」读成「3nm 时代已到来」——发布 vs 量产爬坡 vs 良率 vs 客户采用 vs 收入占比的时间账：台积电 3nm 收入占比 2023 全年仅 6%、2024 全年 18%、2025 全年 24%（官方逐字，见第七章表）；三星 3GAE 首发早于台积电约半年，但官方用词是「initial production」而非「mass production」[一手逐字]，首发客户是中国矿机芯片公司[一手逐字]，Exynos 2500 因良率传闻最终未进 Galaxy S25[多源检索]。
- 反向红跳：对称审计反方向的四句话——「摩尔定律已死」「3nm 是纯营销骗局」「中国已超越台积电」「英特尔已出局」，加一条「半导体停滞无用」。四句全部不立（见第十章）。
1.3 落位：本库技术兑现审计家族
本库已有「技术时间表、完工判据与『数字连着条件报』」家族：固态电池篇（判据在场而口径缺席）、L5 篇（边界由被测方自定）、SMR 篇（技术兑现审计第五件）、容错量子篇（完工判据谱系）、CVSS 篇（被读成判断的那个数）。本篇是「名号」维度的技术兑现审计：前面的篇目审「判据/口径/时间表」，本篇审「名字本身」——一个从物理单位（纳米）变成营销档位（nm 代号）再变成传播货币（「3nm 芯片」）的会计问题。
1.4 去重实测
用 python 逐词扫全库（不用 grep，本环境的 ugrep 对大文件会静默返回空，见 runbook）。全库 204 篇 / 7,437,892 字符，检索 半导体/台积电/晶体管/制程/光刻/EUV/中芯/晶圆/chiplet/FinFET/代工/摩尔定律/3 纳米 等 14 组词：
- 台积电／EUV／中芯／晶圆／chiplet／FinFET／3 纳米（产业语境）全部零命中；
- 半导体 4 处、晶体管 3 处、光刻 2 处、摩尔定律 14 处：全部落在技术奇点篇（AI 叙事语境）、固体强度篇（晶体生长语境）、拓扑物态篇（材料物理语境）的旁注里；
- 制程 3 处：微塑料篇（「制程」字面义）、热量限制篇（加工语境）；代工 7 处：AI 替代劳动力篇（「代工」字面义）——均非半导体义。
结论：半导体制造工艺/制程节点专篇全库零命中，可安全开题。
1.5 边界对四篇写死
- 与技术奇点篇（2026-07-03）：那篇的摩尔定律 14 处命中在 AI 能力外推的叙事语境（「算力增长」旁证）；本篇审半导体制造工艺的名号与兑现，不碰 AI 能力外推、奇点预测、算力增长叙事。
- 与容错量子篇（2026-08-02）：那篇是量子比特的阈值定理与完工判据（逻辑量子比特）；本篇是硅基 CMOS 代工的工艺节点——不同技术、不同判据，但同属「完工判据谱系」家族，本篇引用其「判据在场」框架作家族对照。
- 与固态电池/L5/SMR 篇：技术兑现审计家族同区（B1），本篇是「名号」维度的新一格，不重复判据账。
- 与拓扑物态篇（2026-06-12）：那篇半导体命中为材料物理语境，无关。
1.6 方法备案
- 取证通路：厂商官方新闻稿（三星 news.samsung.com 200、台积电 pr.tsmc.com 200——注意官网 www.tsmc.com 新闻室路径 404，正确入口是 pr.tsmc.com；苹果 newsroom 200；英特尔 newsroom 403 走 Wayback id_ 原件或 newsroom.intel.cn 镜像）、SEC EDGAR/8-K（台积电 6-K 与英特尔 8-K 官方存档）、IEDM 论文（IEEE Xplore 418 反爬时走 SemiWiki/TechInsights 二手逐字）、IRDS 路线图（irds.ieee.org 200，PDF 直取）、IEEE Spectrum 200、SemiEngineering 200、Tom’s Hardware 200、WikiChip（直连挂起走 Wayback/web_extract）、中文媒体（IT之家 200、观察者网 JS 壳走转载版、中央社 200）。
- 承重统计一律 python3。
- 已知风险登记：英特尔 newsroom 403（Akamai）；IEEE Xplore 418「Unusual Traffic」（IEDM 论文正文取不回，二手逐字覆盖）；Reuters 401（Wayback id_ 可通，但 2025 年部分快照本身 401——降级为摘录级）；SEC 直连 403（需声明式 UA 或 Wayback）；AnandTech 2024-08 停更（历史文章走 Wayback）；SemiEngineering「Big Trouble at 3nm」URL 实为 2018-06-21 文章（任务书预填年份勘误，正文按 2018 引用）；任务书预填的苹果 M4 URL 404（正确 slug 为 apple-introduces-m4-chip）。
二、核验标记与层速览
核验标记沿用本库四档：[一手逐字]＝原文逐字取自实际取回文件；[文献较稳]＝多源一致或权威评估；[需亲核]＝正文未全取回或版本存疑；[多源检索]＝方法学阴性检索。
| 层 | 名称 | 核心问题 | 裁决方向 |
|---|---|---|---|
| 三 | 守真锚 | 3nm 工艺真不真、量产真不真 | 一条不动 |
| 四 | 名号谱系账 | 「3nm」是怎么变成代号的 | 尺寸→档位→货币 |
| 五 | 物理对比账 | N3/3GAE/18A 的真实数字 | 没有 3nm 的物理 |
| 六 | 归属跳·首发与最先进 | 「首发」=「最先进」吗 | 首发≠领先 |
| 七 | 兑现跳·量产爬坡账 | 发布到兑现的距离 | 三年爬坡账 |
| 八 | 制度与数据账 | 谁定义节点、数据哪来 | 无官方定义机构 |
| 九 | 消费与传播账 | 标题如何演化 | 名号成货币 |
| 十 | 反向红跳 | 四个反向说法 | 全部不立 |
| 十一 | 母裁决 | 一句话裁决 | 见末章 |
三、守真锚（这一侧一条都不动）
1. 三星 3GAE 是真实的首发量产。 三星官方新闻稿（2022-06-30，curl 200）逐字「Samsung Electronics…today announced that it has started initial production of its 3-nanometer (nm) process node applying Gate-All-Around (GAA) transistor architecture」「Samsung is starting the first application of the nanosheet transistor」[一手逐字]；同日数字逐字「Compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16%」[一手逐字]。注意官方用词是「initial production」（初始生产），不是「mass production」——「首发」是真的，「首发量产」的「量」字是传播层加的。
2. 台积电 N3 是真实的量产工艺。 台积电官方新闻稿（2022-12-29，curl 200）逐字「3nm technology has successfully entered volume production with good yields」[一手逐字]；同一份文件（SEC 6-K 存档）给出真数字逐字「Compared with the 5nm (N5) process, TSMC’s 3nm process offers up to 1.6X logic density gain and 30-35% power reduction at the same speed, and supports the innovative TSMC FINFLEX™ architecture」[一手逐字]——台积电自报的密度增益/功耗降低是工艺进步的真实度量，没有任何一处声称物理尺寸是 3 纳米。
3. 「节点名≠物理尺寸」是官方承认的会计，不是外人的揭发。 英特尔 2021-07-26 官方新闻稿（Wayback 原件）逐字「The industry has long recognized that traditional nanometer-based process node naming stopped matching the actual gate-length metric in 1997」[一手逐字]；SEC 8-K 官方对应表逐字「10nm Enhanced SuperFin → Intel 7」「Intel 7nm → Intel 4」[一手逐字]；台积电研究院副院长 Philip Wong（Hot Chips 31 主旨演讲，PCGamesN 逐字转述）逐字「Today, these numbers are just numbers. They’re like models in a car – it’s like BMW 5-series or Mazda 6. It doesn’t matter what the number is, it’s just a destination of the next technology, the name for it. So, let’s not confuse ourselves with the name of the node with what the technology actually offers.」[一手逐字]——台积电自己把「名号与技术的差价」说清楚了。
4. 苹果 A17 Pro 是第一款商用的台积电 N3 芯片。 苹果官方新闻稿（curl 200）逐字「iPhone 15 Pro and iPhone 15 Pro Max are powered by A17 Pro, the industry’s first 3-nanometer chip」[一手逐字]；M3 家族逐字「the first personal computer chips built using the industry-leading 3-nanometer process technology」[一手逐字]；M4 逐字「M4 consists of 28 billion transistors built using a second-generation 3-nanometer technology」[一手逐字]。
5. 工艺进步是真实的，与名号脱钩是真实的，两者并存。 台积电 N3 的 1.6X 密度增益与 30-35% 功耗降低（官方）、三星 3GAE 的 45% 功耗降低（官方）、苹果 M3 的 25 billion 晶体管（官方，M3 新闻稿逐字「M3 features 25 billion transistors — 5 billion more than M2」[一手逐字]）——都是官方数字；而「没有任何物理尺寸是 3 纳米」（第五章）也是官方承认的。
四、名号谱系账（节点命名的三个时代）
4.1 物理尺寸时代（1972-1995）：节点名≈沟道长度
EEJournal《No More Nanometers》（Kevin Morris，2020-07-23，curl 200）给出命名史的底表，逐字「Intel held the line from “10 micron” in 1972 through “0.35 micron” in 1995, an impressive 23-year run where the node name matched gate length」[一手逐字]；IEEE Spectrum《A Better Way to Measure Progress in Semiconductors》（2020-07-21，印刷版标题「The Node is Nonsense」，curl 200）逐字「Using the gate length and half-pitch as the node number served its purpose all through the 1970s and ’80s, but in the mid-1990s, the two features began to uncouple」[一手逐字]；SemiEngineering《A Node By Any Other Name》（2014-05-12，curl 200）逐字「If we go back to the early 1990s, all was well…a 0.5μm or 0.35μm process meant that those dimensions all lined up」[一手逐字]。
4.2 1997 分水岭与营销时代：数字开始漂移
EEJournal 逐字「Then, in 1997 with the “0.25 micron/250 nm” node they started over-achieving with an actual Lg of 200 nm…This “sandbagging” continued through the next 12 years, with one node (130nm) having Lg of only 70nm – almost a 2x buffer. Then, in 2011, Intel jumped over to the other side of the ledger, ushering in what we might call the “overstating decade” with the “22nm” node sporting an Lg of 26 nm. Since then, things have continued to slide further in that direction, with the current “10nm” node measuring in with an Lg of 18 nm – almost 2x on the other side of the “named” dimension.」[一手逐字]——两个方向的漂移都发生过：1997-2009 年「藏拙」（实际比名号小，130nm 名号配 70nm 栅极），2011 年起「夸大」（22nm 名号配 26nm 栅极、10nm 名号配 18nm 栅极）。IEEE Spectrum 独立印证逐字「For example, transistors made using the so-called 130-nm node actually had 70-nm gates」[一手逐字]；ExtremeTech（2021-02-12，curl 200）逐字「There is no fixed, objective relationship between any feature of the CPU and the name of the node. This was not always the case. From roughly the 1960s through the end of the 1990s, nodes were named based on their gate lengths.」「the last time this was true was 1997」[一手逐字]。
各代名号 vs 实际尺寸的漂移账（全部逐字）：
| 名号 | 实际尺寸（逐字出处） |
|---|---|
| 130nm | 栅极 70nm（EEJournal、IEEE Spectrum 双源）[一手逐字] |
| 65nm | 栅极 32nm、M1 半节距 105nm（SemiEngineering 引 Arnold 2009）[一手逐字] |
| 45nm | Intel 报告栅极 35nm（EDN 拆解，2008）[一手逐字] |
| 22nm | 栅极 26nm、半节距 40nm、鳍宽 8nm（IEEE Spectrum）[一手逐字] |
| 10nm | 栅极 18nm（EEJournal）；WikiChip 逐字「The term “10 nm” is simply a commercial name…as opposed to gate length or half pitch」[一手逐字] |
| 5nm | IRDS 度量 G48M36T1——接触栅距 48nm、金属节距 36nm（IEEE Spectrum）[一手逐字] |
| 7nm | 栅距 56-57nm、金属节距 40nm（SemiEngineering《5nm Vs. 3nm》，IC Knowledge/TEL 口径）[一手逐字] |
| 3nm | 栅长 16-18nm、金属节距约 23nm（Laptop Mag，2025-06-26）；N3 接触栅距 45nm（见第五章）[一手逐字] |
「5nm 与 5 纳米毫无关系」的最强句（EEJournal，curl 200）逐字「Let’s start by speaking some truth. Nothing about the “5 nanometer” CMOS process has any real relationship to five actual nanometers and transistor size. That train jumped off the rails years ago, and the semiconductor industry has inflicted tremendous self-harm by perpetuating the nanometer myth.」[一手逐字]；IEEE Spectrum逐字「The picture the semiconductor technology node system paints is false. Most of the critical features of a 7-nm transistor are actually considerably larger than 7 nm」[一手逐字]。
4.3 英特尔「10nm 事件」（2017-2019）与「Intel 10nm≈台积电/三星 7nm」的公开秘密
- EE Times（2017-03-29，Wayback 原件）逐字「At 10nm, Intel will pack 100.8 million transistors per square millimeter. It estimated 10nm foundry processes now in production from TSMC and Samsung have about half that density.」「Intel said it will start making 10nm Cannonlake chips in the second half of this year」[一手逐字]——2017 年的官方口径是「密度两倍于台积电/三星 10nm」，并承诺 2017 下半年投产；
- Tom’s Hardware（2018-04-27）转 Intel CEO Krzanich Q1 2018 财报会原话逐字「We are shipping in low volume and yields are improving, but the rate of improvement is slower than we anticipated. As a result, volume production is moving from the second half of 2018 into 2019」[一手逐字]——官方承认跳票；
- 最终量产：Intel Q2 2019 财报稿（SEC 存档）逐字「New, 10nm-based 10th Gen Intel® Core™ processors (code-named “Ice Lake”) are now shipping」[一手逐字]——2017 承诺、2019 兑现；
- 「10nm≈7nm」的共识句：EEJournal逐字「Most industry folks understand that Intel’s “10nm” process is roughly equivalent to TSMC and Samsung’s “7nm” processes. But non-industry publications regularly write that Intel has “fallen behind”…The truth is, these are marketing names only」[一手逐字]；AnandTech（2021-07-26，Wayback）逐字「It is no secret that having “Intel 10nm” being equivalent to “TSMC 7nm”, even though the numbers actually have nothing to do with the physical implementation, has ground at Intel for a while…when we moved from 2D planar transistors to 3D FinFET transistors, the numbers became nothing more than a marketing tool」[一手逐字]——「把名号当尺寸」造成的误读（Intel 落后论）是业界公认的传播事故，源头是名号本身。
4.4 英特尔 2021 改名运动（2021-07-26「Intel Accelerated」）
官方新闻稿（Wayback 原件，curl 200）要点逐字「New node naming to create consistent framework, more accurate view of process nodes for customers and the industry as Intel enters the angstrom era of semiconductors」[一手逐字]；正文核心句逐字「The industry has long recognized that traditional nanometer-based process node naming stopped matching the actual gate-length metric in 1997. Today, Intel introduced a new naming structure for its process nodes, creating a clear and consistent framework to give customers a more accurate view of process nodes across the industry」[一手逐字]；SEC 8-K 官方对应表（curl 200 真 PDF）逐字「Previous Process Node Name → New Process Node Name / 10nm Enhanced SuperFin → Intel 7 / Intel 7nm → Intel 4」[一手逐字]；新名号定义逐字「Intel 7 delivers an approximately 10% to 15% performance-per-watt increase versus Intel 10nm SuperFin」「Intel 4 fully embraces EUV lithography…ready for production in the second half of 2022」「Intel 20A ushers in the angstrom era with two breakthrough technologies, RibbonFET and PowerVia」「Beyond Intel 20A, Intel 18A is already in development for early 2025」[一手逐字]；CEO Gelsinger 官方解释（Fierce Sensors 转述，curl 200）逐字「”We need to evolve the way we talk about process nodes,” said Intel CEO Pat Gelsinger…”These days the various naming and number schemes used across the industry, including ours, no longer refer to any specific measurement [of gate or other chip aspects]”」[一手逐字]；PCWorld（2021-07-26，curl 200）逐字「But what defines a “7nm” process has become increasingly abstract, to the point at which some, like Intel, would argue that the term has become essentially meaningless. Instead, Intel will distinguish process nodes by a new metric: performance per watt」[一手逐字]。
4.5 台积电与三星的官方口径
- 台积电有承认句：Philip Wong Hot Chips 31 主旨演讲（PCGamesN 逐字转述，curl 200）——见守真锚 3；另一处官方口径：CEO 魏哲家以密度而非尺寸定义代际（SemiEngineering 2019转述财报会原话）逐字「”The numbers N6 and N5 look pretty close, but they still have a big gap,” said C. C. Wei…”For N5 compared with N7, the logic density increased by 80%. N6 compared with N7 is only 18%”」[一手逐字]；
- 三星没有承认句（阴性登记）：web_search 多组关键词（”Samsung 3nm ‘not a physical’ / ‘does not refer’ / ‘marketing’ node name”）未发现三星官方承认「3nm 名称非物理尺寸」的表述[多源检索]；但三星的行为证据存在：Tom’s Hardware（2024-03-05，curl 200）转 ZDNet 报道逐字「Samsung Foundry has reportedly decided to rebrand its 2nd generation 3nm-class fabrication technology, known as SF3, to a 2nm-class manufacturing process called SF2, thus requiring a contract to be rewritten」＋消息源逐字「”We were informed by Samsung Electronics that the 2nd generation 3nm [name] is being changed to 2nm,” a source told ZDNet」[一手逐字]——三星 2024 年把自家第二代「3nm」改名「2nm」并要求客户改合同：「3nm」名号被三星自己废弃。
4.6 中文语境
- OFweek 电子工程网（2023-09-19，curl 200，GB18030 转码）逐字「事实上，你还真是说对了，现在的3nm芯片中，没有一个关键参数是3nm，现在的3nm、5nm什么的，还真是营销游戏，晶圆厂们说了算」[一手逐字]（并给 CPP 折半口径换算：7nm≈27nm、5nm≈25nm、3nm≈22nm[一手逐字]）；
- 新浪财经（2026-05-10，curl 200）逐字「从7nm 工艺世代开始，节点名称正式与物理尺寸分道扬镳」「’3nm’（N3）工艺的实际接触栅极间距约为48nm。’3nm’标签代表的是性能和密度的代际飞跃，而非3纳米的物理尺寸」[一手逐字]（Tier C 编译稿，英文原文出处待考，[需亲核]）；
- 虎嗅网（2022-12-15，curl 200）逐字「现在的芯片制程都是虚标，几纳米只是营销用语」[一手逐字]（Tier C 自媒体）；
- IT之家（2022-08-02，curl 200）编译报道引哈佛商学院教授 Willy Shih 逐字「这是营销炒作的胜利」「纳米命名法现在简直成了一家芯片厂商愿意在多大程度上歪曲事实的标准」[一手逐字]（原出处为外媒，[需亲核]）。
五、物理对比账（N3 vs 3GAE vs 18A 的真实数字）
5.1 台积电 N3：CPP 45nm、HD SRAM 0.0199 µm²、M0 23nm
SemiWiki《IEDM 2022 – TSMC 3nm》（Scotten Jones，2022-12，curl 200）逐字摘录 IEDM 2022 台积电论文《Critical Process features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond》：
「a Contacted Gate Pitch (Contacted Poly Pitch, CPP as I describe it) of 45nm is disclosed」[一手逐字]； 「This work enabled the N3 process with a high-density SRAM size of 0.0199 μm²」＋「In this paper a high-density SRAM cell size of 0.021 μm² is disclosed. Larger than the N3 SRAM cell of 0.0199 μm²」（N3E 反而放宽到与 N5 相同）[一手逐字]； 「Minimum metal pitch of 23nm with copper interconnect」[一手逐字]； FinFlex 密度逐字「the 2-2 fin cells are 1.39x denser than 2-2 cells in 5nm, and the 2-1 cells offer a 1.56x density improvement」[一手逐字]（与官方 1.6X 口径一致）。
TechInsights《TSMC Reveals 3nm Process Details》（Dick James，curl 200）独立交叉验证逐字「N3 reduces CPP by 6nm compared with N5. SRAM cells are no smaller in N3E than in N5.」[一手逐字]（N5 CPP 51nm − 6nm = 45nm，两源一致）；并给出物理极限句逐字「FinFETs have reached fundamental limits…Consequently, 3nm will be TSMC’s last before moving to other transistor types」[一手逐字]。
5.2 三星 3GAE：官方只给相对增益，没有任何纳米数值
三星官方新闻稿（2022-06-30，curl 200）逐字「Compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16%」＋官方确认纳米片宽度可调逐字「Samsung will be able to adjust the channel width of the nanosheet in order to optimize power usage and performance」[一手逐字]——没有任何纳米数值；WikiChip Fuse（2022-07-05，Wayback）逐字「The answer is 3. Their initial 3-nanometer process technology will feature 3 stacked nanosheets」「Samsung has talked about four predefined nanosheet widths…The widest nanosheet variant offers 1.7x the frequency at 1.6x added capacitance」[一手逐字]——仍无 nm 数值（[取不回登记]：3GAE 纳米片宽度/SRAM/M0 无公开逐字数字）；等效定位句逐字「Roughly speaking, Samsung’s 3GAE will surpass TSMC’s N5, but it’s entirely possible it will tie in terms of density against N4. Looking ahead into next year, 3GAP might be fairly comparable to TSMC’s N3 node」[一手逐字]——三星「3nm」的密度只对标台积电的 4nm/3nm 级。
5.3 英特尔 Intel 4 / Intel 3 / 18A
AnandTech《Intel 4 Process Node In Detail》（2022-06-13，Wayback）物理参数表逐字「Fin Pitch | 30 nm | 34 nm / Contact Gate Poly Pitch | 50 nm | 54/60 nm / Minimum Metal Pitch (M0) | 30 nm | 40 nm」[一手逐字]；SemiAnalysis《Meteor Lake Die Shot and Architecture Analysis》（2022-05-26，curl 200）逐字「The high-density SRAM cell size is now 0.024um2 on Intel 4 vs 0.021um2 on TSMC N5…Intel is still behind the 2.5-year-old N5 process technology from TSMC in SRAM density even according to the official claims」「there is roughly only a 40% area reduction versus the Intel 7 node. This realized density improvement is very different from the 2x theoretical density gains」[一手逐字]；Intel 3 官方（Intel Community Blog，VLSI 2024，Wayback）逐字「The base Intel 3 process node delivers up to 18% better performance at the same power…and up to 10% greater density than the previous generation Intel 4 node」[一手逐字]；Intel 18A 官方页（Wayback）逐字「Up to 15% better performance per watt and 30% better chip density vs. the Intel 3 process node」「Industry-first PowerVia backside-power delivery technology」「RibbonFET gate-all-around (GAA) transistor technology」[一手逐字]。
5.4 等效对比表与结论
三家「3nm 级」节点的物理数字（全部逐字出处见上）：
| 参数 | TSMC N3 | 三星 3GAE | Intel 4 / Intel 3 |
|---|---|---|---|
| 接触栅极间距 CPP | 45nm | 40nm | 50nm / 50nm |
| 最小金属间距 | 23nm | 32nm（互连间距） | 30nm / 30nm |
| HD SRAM cell | 0.0199 µm² | 未取回 | 0.024 µm² |
| 密度（第三方估计） | ~197 MTr/mm² | ~150 MTr/mm² | ~160 MTr/mm²（HP 库） |
| 架构 | FinFET（3nm 是末代） | GAA MBCFET（3 片纳米片） | FinFET / RibbonFET+PowerVia（18A） |
没有任何一个物理参数在 3nm 量级——这是五条独立来源的共识（B 捆证据链对照，全部逐字）：
- WikiChip（web_extract）逐字「The term “3 nm” is simply a commercial name for a generation of a certain size and its technology, and does not represent any geometry of the transistor」[一手逐字]；
- EEJournal逐字「So essentially, since 1997, the node name has not been a representation of any actual dimension on the chip, and it has erred in both directions by almost a factor of 2」[一手逐字]；
- ExtremeTech逐字「There is no fixed, objective relationship between any feature of the CPU and the name of the node」「Samsung, for example, is deploying many more node names than it used to. That’s marketing」[一手逐字]；
- SemiEngineering《Big Trouble At 3nm》（实为 2018-06-21 文章，curl 200）引 IBS 总裁 Handel Jones 逐字「The problem is the definition of 3nm and (understanding) the real benefits of gate-all-around」[一手逐字]（同一篇另含 Imec 3nm 级参考尺寸逐字「Imec’s nanosheet FET has a gate pitch of 42nm and a metal pitch of 21nm」[一手逐字]）；
- TechInsights逐字「Gate lengths cannot shrink further without compromising control of the channel…Transistor development has hit a wall. …Consequently, 3nm will be TSMC’s last before moving to other transistor types」[一手逐字]。
制度侧的同一结论（第八章展开）：IRDS 2022 执行摘要（PDF 直取，p37）逐字「The third line indicates the “industry labeling” of nodes that clearly appears to be completely disconnected from reality」[一手逐字]——「行业标签与现实的完全脱节」被写进了行业自己的路线图文件；同一文件 Table ES3 把 2022 年的名号「3」对应的物理定义列为「G48M24」（48nm 栅极间距/24nm 金属间距）[一手逐字]。
六、归属跳·首发与最先进
6.1 三个「第一」的措辞账
三星抢「时间上的第一」：官方新闻稿（2022-06-30）逐字「We seek to continue this leadership with the world’s first 3nm process with the MBCFET™」[一手逐字]；Reuters（Wayback 原件）逐字「Samsung Electronics…said on Thursday it has begun mass producing chips with advanced 3-nanometre technology, the first to do so globally, as it seeks new clients to catch far bigger rival TSMC」[一手逐字]——注意路透同时点出「to catch far bigger rival TSMC」：首发是为了追赶。
台积电抢「性能上的第一」：官方新闻稿（2022-12-29）逐字「TSMC’s 3nm process is the most advanced semiconductor technology in both power, performance, and area (PPA) and in transistor technology, and a full-node advance from the 5nm generation」[一手逐字]。
苹果抢「名号上的第一」：A17 Pro 新闻稿（2023-09-12）逐字「A17 Pro, the industry’s first 3-nanometer chip」[一手逐字]——注意：苹果这句话把「3 纳米」当成芯片的名号用，而它指的是台积电 N3 工艺（名号本身）——三个「第一」各指一件事（时间/性能/名号），传播链把它们合并成「3nm 芯片 = 全球最先进」。
6.2 「首发≠最先进」的三年实账（兑现账预演）
- 三星 3GAE 首发（2022-06-30，initial production）→ 三年后（2024-10）：TrendForce 新闻页（curl 200）逐字「In the second half of this year, Samsung ramped up production of its Gate-All-Around (GAA) 3nm second-generation process, but unstable yields have failed to attract clients. Major tech players like Nvidia and Apple have partnered with TSMC, leaving Samsung struggling」[一手逐字]（Business Korea 报道转述，非三星官方表述）；
- 台积电 N3 晚半年量产（2022-12-29）→ 三年后苹果 A17/M3/M4/A18 全系、骁龙 8 Elite、天玑 9400 都在台积电 N3 系上（见第七章）；
- 英伟达 RTX 50 系列（2025-01）是「3nm 芯片」叙事的关键裁决点：英伟达官方白皮书（curl 200）规格表逐字「Manufacturing Process … TSMC 4nm 4N NVIDIA Custom Process」（RTX 5080/5090 行）[一手逐字]；Tom’s Hardware（curl 200）逐字「Nvidia RTX 50 series GPUs utilize TSMC’s custom 4NP process technology…This is a continuation of TSMC’s 5nm-class manufacturing family」「Nvidia’s Rubin architecture is expected to be the first consumer GPU generation manufactured on TSMC’s 3nm-class process technology. Projected to debut in late 2026 with the RTX 60 series」[一手逐字]——2025 年最受关注的「旗舰芯片」RTX 50 明确不是 3nm；消费级 GPU 的 3nm 要等 2026 年底的 RTX 60（Rubin，N3P）。若被审文本把 RTX 50 写成「3nm 芯片」，即名号跳的直接实例。
七、兑现跳·量产爬坡账
7.1 台积电 N3 收入占比账（官方数字，六时点）
「3nm 时代已到来」的尺子是钱。台积电官方财报口径（全部 curl 200 逐字）：
| 时点 | 3nm 占晶圆收入 | 官方出处（逐字） |
|---|---|---|
| 2023 全年 | 6% | 4Q23 Management Report逐字「On a full year basis, 3nm contribution reached 6% of total wafer revenue in 2023」[一手逐字] |
| 4Q23 | 15% | 4Q23 财报新闻稿逐字「shipments of 3-nanometer accounted for 15% of total wafer revenue; 5-nanometer accounted for 35%; 7-nanometer accounted for 17%」[一手逐字] |
| 2024 全年 | 18% | 4Q24 Management Report逐字「3nm contribution reached 18% of total wafer revenue in 2024 while 5nm and 7nm process technology contributed 34% and 17% respectively」[一手逐字] |
| 4Q24 | 26% | 4Q24 财报新闻稿逐字「shipments of 3-nanometer accounted for 26% of total wafer revenue; 5-nanometer accounted for 34%」[一手逐字] |
| 2025 全年 | 24% | 4Q25 法说会逐字稿逐字「On a full-year basis, three-nanometer revenue contribution came in at 24% of 2025 wafer revenue, five-nanometer 36% and seven-nanometer 14%」[一手逐字] |
| 4Q25 | 28% | 4Q25 财报新闻稿逐字「shipments of 3-nanometer accounted for 28% of total wafer revenue; 5-nanometer accounted for 35%」[一手逐字] |
兑现账第一格：3nm 上市元年（2023）只占台积电晶圆收入 6%——「2022 年宣布量产」与「3nm 时代到来」之间隔着三年的爬坡；到 2025 年（第三个完整年）才到 24%。
7.2 台积电 N3 系列时间线（官方）
- N3：2022-12-29 量产（守真锚）；
- 2023 北美技术研讨会（2023-04-26，curl 200）逐字「With 3nm technology now in volume production with the N3 process and the enhanced N3E version on the way in 2023, TSMC is adding new variants」「These include N3P, an enhanced 3nm process for better power, performance and density, N3X, a process tailored for high performance computing (HPC) applications, and N3AE」＋「N3P, scheduled to enter production in the second half of 2024, offers…5% more speed at the same leakage, 5-10% power reduction at the same speed, and 1.04X more chip density」「N3X, which prioritizes performance…will enter volume production in 2025」[一手逐字]；
- 2Q23 法说会（2023-07-20，curl 200 PDF）逐字「N3 is already in volume production with good yield…N3 is expected to continue to contribute mid-single-digit percentage of our total wafer revenue in 2023」「N3E further extends our N3 family with enhanced performance, power and yield…N3E has passed qualification and achieved performance and yield target and will start volume production in the fourth quarter of this year」[一手逐字]；
- 3Q23 法说会（2023-10-19）重申「N3E has passed qualification and achieved performance and yield targets and will start volume production in fourth quarter of this year」[一手逐字]；
- 2023 年报逐字「Our industry-leading 3-nanometer technology entered high volume production with a strong ramp in the second half of 2023」[一手逐字]；
- Tom’s Hardware（2024-05-16，curl 200）独立确认 N3E 落地逐字「TSMC successfully started production of chips on its second generation 3nm-class process technology in the fourth quarter of 2023, meeting its planned milestones」＋引台积电高管逐字「”We have also successfully delivered N3P technology…It has passed qualification and yield performance is close to N3E”」[一手逐字]。
7.3 三星 3GAE：良率传闻链与客户账
良率账（全部为传闻/券商报告/媒体转述，三星官方从不披露良率数字，一律标注「公司未确认」）：
| 时点 | 传闻数字 | 来源（逐字） | 层级 |
|---|---|---|---|
| 2022-04 | 10–20% | wccftech 转 Business Post/DigiTimes逐字「Unfortunately, yield rates have just arrived between 10 and 20 percent」[一手逐字] | 媒体转述，公司未确认 |
| 2023-01 | 「10% 区间」→「a perfect level」 | 韩国经济日报 KED（curl 200）逐字「At the time, the production yield of Samsung’s 3 nm chips was speculated to remain in the 10% range」「Now Samsung’s first-generation 3 nm process node reached “a perfect level” of production yields, said a source with knowledge of the situation」[一手逐字] | 匿名消息源，自相矛盾 |
| 2023-07 | 约 60% | The Register（curl 200）引 Hi Investment 报告逐字「Samsung has been able to achieve 60 percent yields on its 3nm node」＋媒体自警逐字「While reports of foundry yields are often speculative – to say the least」[一手逐字] | 券商报告级，公司未确认 |
| 2024-08 | Exynos 2500 良率 <20% | Korea Herald/The Investor（curl 200）逐字「But sources say the yield rate remains at less than 20 percent, far below the 60 percent required for mass production」[一手逐字] | 匿名消息源，公司未确认 |
三星官方财报口径（2Q23/3Q23 财报稿，curl 200）逐字「The Foundry Business is smoothly mass producing its third product using GAA technology thanks to the stabilization of the 3-nanometer (nm) process」「The Foundry Business is stabilizing the GAA processes by continuously improving the yield of the second-generation 3nm process」[一手逐字]——官方只给「稳定化/持续改善」的过程词，从不给数字。
客户账：The Elec（2022-06-28，curl 200）逐字「The first customer for the process will be the Chinese application-specific IC firm, sources said」「Qualcomm had given its 3nm work to TSMC first because Samsung couldn’t meet the yield requirements」[一手逐字]；TechSpot/AnandTech（2023-08，curl 200）逐字「AnandTech noted that Samsung has been using its SF3E node (formerly known as 3GAE…) to make chips for dedicated cryptocurrency miners for multiple outfits including MicroBot and PanSemi」[一手逐字]——首发客户是中国矿机芯片公司（PanSemi，[多源检索]点名）；TrendForce（2024-10）逐字「Major tech players like Nvidia and Apple have partnered with TSMC, leaving Samsung struggling to secure similarly high-profile contracts」[一手逐字]；Exynos 2500 结局：官方计划（2Q24 财报稿，2024-07-31）逐字「The Company also plans to ensure a stable supply of the Exynos 2500 for flagship models」[一手逐字]→ 2025-01 Galaxy S25 全系用高通（Reuters 摘录级：标题要点「Galaxy S25 uses Qualcomm chips, ditches Exynos」[多源检索]）——兑现账第二格：三星 3nm 自制 SoC 三年未进自家旗舰。
7.4 苹果/高通/联发科采用史（官方逐字）
- A17 Pro（2023-09-12）「the industry’s first 3-nanometer chip」[一手逐字]；M3（2023-10-30）「the first personal computer chips built using the industry-leading 3-nanometer process technology」＋「M3 features 25 billion transistors — 5 billion more than M2」[一手逐字]；M4（2024-05-07）「second-generation 3-nanometer technology」＋28 billion transistors[一手逐字]；A18/A18 Pro（2024-09-09）「Built with second-generation 3-nanometer technology」[一手逐字]；
- 骁龙 8 Elite官方产品简报规格表逐字「3nm Process Technology」[一手逐字]；The Register（2024-10-22）确认逐字「Qualcomm is using TSMC’s 3nm N3E node, which is actually the same process used by rivals including Apple for its A18 chips and MediaTek with its Dimensity 9400」[一手逐字]；
- 联发科天玑 9400（2024-10-09，curl 200）逐字「Built on TSMC’s second-generation 3nm process, the Dimensity 9400 is up to 40% more power-efficient than its predecessor」[一手逐字]。
7.5 英特尔 18A 兑现账（官方逐字）
- Intel 3 官方博客（2024-06，Wayback）逐字「As planned, the Intel 3 node reached its manufacturing readiness milestone at the end of last year…this node reached high-volume production at our R&D site in Oregon and is now also producing chips in high volume in our Leixlip, Ireland fab for foundry customers, including server processors in the Intel Xeon 6 platform」[一手逐字]；
- 18A 里程碑稿（2024-06-24，curl 200）逐字「Intel 18A, Intel Foundry’s leading-edge process node, is on track for production in 2025」「its lead products on Intel 18A, Panther Lake (AI PC client processor) and Clearwater Forest (server processor), are out of the fab and have powered-on and booted operating systems. These milestones were achieved less than two quarters after tape-out」[一手逐字]；
- Panther Lake 发布稿（2025-10-09，curl 200）逐字「Panther Lake is the company’s first product built on Intel 18A, the most advanced semiconductor process ever developed and manufactured in the United States」「Panther Lake will begin ramping high-volume production this year, with the first SKU slated to ship before the end of the year」「Intel 18A is the first 2-nanometer class node developed and manufactured in the United States, delivering up to 15% better performance per watt and 30% improved chip density compared to Intel 3」[一手逐字]——英特尔官方自定位「2nm 级」；
- 「18A ≈ 台积电 N2」等效句：EEJournal（curl 200）逐字「TSMC has said that its equivalent process node, N2, will be ready in the second half of 2025」[一手逐字]；Gelsinger（Barron’s 访谈，wccftech 转述，curl 200）逐字「I think everybody’s looking at the transistor of TSMC’s N2 versus our 18A. It’s not clear that one is dramatically better than the other…I think I’m a little bit ahead of N2, TSMC’s next process technology in time」[一手逐字]——18A 的对标物是 N2（2nm 级），不是 3nm 级。
7.6 中芯国际：7nm/5nm 报道的真实性账
- 2022-07 矿机芯片 N+1：TechInsights 在 MinerVA7 矿机芯片确认 SMIC N+1 7nm（TechInsights 回溯句逐字「advancing it from its N+1 7nm node found by TechInsights in July 2022 in the MinerVA7 Bitcoin Miner」[一手逐字]）；
- 2023-09 Mate 60 Pro 麒麟 9000S = N+2 7nm：TechInsights（curl 200）逐字「The team found evidence of SMIC 7nm (N+2) which represents a made-in-China design and manufacturing milestone」＋Hutcheson 逐字「demonstrates the technical progress China’s semiconductor industry has been able to make without EUV lithography tools」[一手逐字]；Reuters（Wayback 原件）逐字「Huawei Technologies and China’s top chipmaker SMIC…have built an advanced 7-nanometer processor to power its latest smartphone」＋克制句逐字「Huawei and SMIC did not immediately reply to Reuters’ request for comment」「The specifications provided advertised its ability to make satellite calls, but offered no information on the power of the chipset inside」[一手逐字]；
- 2025-12 麒麟 9030 = N+3，仍非真 5nm：TechInsights（2025-12-11，curl 200）逐字「Our structural and dimensional analysis confirms that the chip is manufactured using SMIC’s N+3 process, a scaled evolution of its 7nm-class technology」「our comparative measurements confirm it remains significantly less scaled than leading commercial 5nm nodes offered by TSMC and Samsung」[一手逐字]；Tom’s Hardware（2025-12-12）标题逐字「Huawei Kirin 9030 mobile SoC made on SMIC N+3 process, but can’t compete with 5nm node」[一手逐字]；SemiAnalysis 拆解（curl 200）逐字「SMIC has not overtaken Intel or TSMC…Overall, SMIC N+3 has a transistor density of 113.4 MTr/mm², slightly above TSMC N6 at 107.7 MTr/mm²」＋「China is not closing the gap with Intel, Samsung and TSMC」[一手逐字]；TechInsights《Huawei Strikes Back》（curl 200）逐字「Pitting it against Apple and Samsung, this device is two to two-and-a-half generations behind…a 7nm process without EUV」[一手逐字]——「中芯 5nm」的叙事到 2025 年底的拆解结论：N+3 的密度追平的是台积电 2020 年的 N6，且无 EUV、多曝光成本高、良率低（AEI 估算：比台积电同级贵 40-50%、良率低至 20%，摘录级[多源检索]）。
八、制度与数据账
8.1 「节点名没有官方定义机构」——IRDS 的官方文件级证据
IRDS 2022 执行摘要（PDF 9.4MB 直取，curl 200）逐字：
「The third line indicates the “industry labeling” of nodes that clearly appears to be completely disconnected from reality」[一手逐字]（p37/印刷页 27）； 「For convenience, the traditional industry “Node Range” Labeling is indicated even though in the past it only closely tracked the half-pitch of nonvolatile memory (NVM) products. The NTRS/ITRS definition of technology naming was based on half-pitch of gate…and metal half pitch」[一手逐字]（p54）； Table ES3：2022 列「Logic industry “Node Range” Labeling (nm)」=「”3″」而「Logic device technology naming note definition」=「G48M24」（48nm 栅极间距/24nm 金属间距）[一手逐字]（p55）——名号「3」的官方物理定义是 48/24nm。
IRDS 2024 执行摘要（curl 200）逐字「There is not yet a consensus on the node naming across different foundries and integrated device manufacturers (IDMs); however, the projected rules give an indication of technology capabilities in line with the PPAC requirements」[一手逐字]（同句在 2022/2023/2024 三版 MM 中复现[一手逐字]）——行业路线图自己承认：节点命名没有跨厂商共识。这就是「谁是 3nm 定义的权威」的答案：没有这样的权威——每个厂自己命名，IRDS 只是记录「行业标签」并标注它与现实脱节。
8.2 IEDM 论文是物理数据的锚
IEDM 2022 Archive（官方 PDF 直取，curl 200）两篇台积电摘要逐字：27.5（Late News）「A 3nm CMOS FinFlex™ Platform Technology…About 1.6X logic density increase, 18% speed improvement and 34% power reduction are achieved over our previous 5nm CMOS process」[一手逐字]（注：1.6X/18%/34% 与 6-K 的 1.6X/30-35% 是同一工艺的两组口径，并表引用）；27.1「We report a leading-edge CMOS technology at 45nm contacted gate pitch that incorporates optimized fin profile…fully functioning 256Mb HC/HD SRAM macros. The 0.0199μm² HD SRAM is the smallest reported to date」[一手逐字]。任务书预填勘误（B 捆实测）：三星 3nm 平台论文实为 IEDM 2018 #28.7（Crossref DOI 10.1109/iedm.2018.8614629）与 VLSI 2023「World’s First GAA 3nm Foundry platform Technology (SF3)」——2022 IEDM Archive 全文检索 3GAE/SF3 零命中[多源检索]。
8.3 良率数据的可靠性分级（本篇数据纪律）
| 层级 | 定义 | 本篇实例 |
|---|---|---|
| ①公司官方确认 | 公司新闻稿/财报/法说会披露 | 台积电「volume production with good yields」（2022-12-29）；三星「smoothly mass producing its third product」「continuously improving the yield」（2Q23/3Q23）——注意：官方只给过程词，从不给良率数字 |
| ②券商/分析师报告 | Hi Investment、TF 郭明錤等 | 三星 3nm 良率 60%（2023-07）、Exynos 2500 <20%（2024-08，Kuo 原话逐字「Qualcomm will likely be the sole SoC supplier for the Samsung Galaxy S25…as the Exynos 2500 may not ship due to Samsung’s lower-than-expected 3-nm yield」[一手逐字]） |
| ③媒体转述 | 转述①②的报道 | wccftech 10-20%（转 DigiTimes）、KED「a perfect level」（匿名源）——同一数据的三年内四种数字（10-20%→perfect→60%→<20%）并存，全部公司未确认 |
数据纪律结论：三星 3nm 良率在本篇证据链中没有任何公司确认的数字；正文引用任何良率数字必须带「传闻/未确认」标注。与之对照，台积电 N3 的官方口径是「good yields」（2022-12-29）与法说会「N3 is already in volume production with good yield」（2Q23）[一手逐字]。
8.4 SEC 公司自报账
台积电 6-K（2022-12-29）与 pr.tsmc.com 新闻稿同文逐字——含「successfully entered volume production with good yields」「1.6X logic density gain and 30-35% power reduction」「most advanced semiconductor technology in both PPA and transistor technology」「TSMC estimates that 3nm technology will create end products with a market value of US$1.5 trillion within five years of volume production」[一手逐字]；英特尔 8-K（2021-07-26，curl 200）改名对应表[一手逐字]（见 4.4）；英特尔 Q2 2019 财报稿 10nm Ice Lake「now shipping」[一手逐字]（见 4.3）；英特尔 Q3 2025 财报（curl 200）逐字「Third-quarter revenue was $13.7 billion, up 3% year-over-year」[一手逐字]——SEC 通道是「公司自报」与「媒体转述」之间的硬分层：本篇承重数字优先取公司自报。
九、消费与传播账
9.1 厂商自我定位措辞对比（四家逐字）
| 家 | 时间 | 自我定位（逐字） |
|---|---|---|
| 三星 | 2022-06-30 | 「the world leader in semiconductor technology」「the world’s first 3nm process with the MBCFET™」[一手逐字] |
| 台积电 | 2022-12-29 | 「the most advanced semiconductor technology in both power, performance, and area (PPA) and in transistor technology」[一手逐字] |
| 苹果 | 2023-09-12 | 「the industry’s first 3-nanometer chip」（A17 Pro）；M3「the industry’s first 3-nanometer chips for a personal computer」[一手逐字] |
| 英特尔 | 2024-06-24 | 「Intel 18A, Intel Foundry’s leading-edge process node, is on track for production in 2025」；2025-10-09「the most advanced semiconductor process ever developed and manufactured in the United States」[一手逐字] |
9.2 国际媒体标题谱系（2022-2026，全部逐字）
| 媒体 | 日期 | 标题（逐字） | 取回方式 |
|---|---|---|---|
| Reuters | 2022-06-30 | 「Samsung Elec starts 3-nanometre chip production to lure new foundry customers」＋正文「the first to do so globally」 | Wayback id_ 200 |
| Bloomberg | 2022-08-17 快照 | 「Samsung Is First to Start Mass Production of 3-Nanometer Chips」＋正文「kicked off mass production…beating rival…key milestone in the race to build the most advanced chips in the world」 | Wayback（OG 标题）200 |
| The Verge | 2022-06-30 | 「Samsung beats TSMC to production of 3nm chips」 | 直连 200 |
| AnandTech | 2022-06-30 | 「Samsung Starts 3nm Production: The Gate-All-Around (GAAFET) Era Begins」＋质疑句「the line between PR and productization is fuzzy, to say the least」 | Wayback id_ 200 |
| Reuters | 2022-12-29 | 「TSMC starts volume production of most advanced chips in Taiwan」＋「good yields」「$1.5 trillion within five years」 | Wayback id_ 200 |
| PCMag | 2022-06-30 | 「Samsung’s 3nm Chips Start Rolling Off Production Lines」 | Wayback 200 |
| Korea Herald | 2022-06-30 | 「Samsung starts mass production of world’s first 3-nm chips」 | 直连 200 |
| TechSpot | 2025-12-30 | 「TSMC’s 2nm N2 process officially enters volume production」 | 搜索快照 |
| Straits Times | 2025-12-31 | 「TSMC says it has started mass production of ‘most advanced’ 2nm semiconductor chips」 | 搜索快照 |
（全部来源链接与 Wayback 时间戳见 E 捆证据链。）
9.3 中文媒体标题谱系（2022-2026，全部逐字）
| 媒体 | 日期 | 标题（逐字） | 取回方式 |
|---|---|---|---|
| IT之家 | 2022-06-30 | 「全球首家：三星宣布已量产 3 纳米芯片」 | 直连 200 |
| 韩联社中文 | 2022-06-30 | 「三星电子全球首发量产3纳米芯片」 | 直连 200 |
| 中央社 | 2022-06-30 | 「三星宣布率先量產3奈米晶片 領先勁敵台積電」 | 直连 200 |
| 中央社（质疑） | 2022-06-30 | 「三星宣布3奈米GAA量產 專家：趕鴨子上架」＋「宣傳意義應大於實質意義」 | 直连 200 |
| 观察者网（新浪转载） | 2022-06-30 | 「三星全球率先量产3nm，首个客户是中国矿机芯片公司？」＋「3nm制程的良率更是只有10%-20%」 | 转载版 200 |
| IT之家 | 2022-12-29 | 「台积电董事长刘德音：3nm 需求非常强劲，是世界上最先进的半导体技术」 | 直连 200 |
| BBC 中文 | 2022-06-30 | 「三星超前台积电量产三奈米晶片：半导体大战背后的地缘政治」 | 直连 200 |
| 中时新闻网 | 2024-05-16 | 「華為5奈米晶片要來了！美媒震驚：不需要EUV也能做出」 | 直连 200 |
| 联合早报（转环球时报社评） | 2023-09 | 「美国的极限打压已经失败」（Mate 60 语境） | 搜索快照 |
| 中央社 | 2025-12-30 | 「台積電宣布2奈米量產 全球最先進製程擴大領先優勢」 | 直连 200 |
中文媒体结构观察：2022 年三星首发标题统一「全球首发/率先量产」，且多家自带质疑（中央社「趕鴨子上架」、观察者网「首个客户是中国矿机芯片公司」）；2023 年 Mate 60 后出现「突破/震惊/打压失败」叙事（F 捆样本）；2025 年底台积电 2nm 量产标题用「全球最先進製程」——「3nm 名号」在中文传播链里从「率先量产」升级到「突破制裁」再到「全球最先进」，全程没有一条标题提到「3nm 不代表物理尺寸」。
9.4 数字的传播命运（关键样本）
- 1.6X 被讹成「60-70%」：The Register（2022-12-29，curl 200）逐字「The foundry operator claims its N3 process will offer 60 to 70 percent higher logic density」[一手逐字]——台积电官方的「up to 1.6X」（上限 1.6 倍）被写成「60-70%」（区间）——官方数字的传播失真样本：上限被读成区间；
- 45%/23%/16% 的转述链：Reuters/Bloomberg/The Verge/Yonhap/PCMag/观察者网全部逐字转述三星官方数字[一手逐字]——三星的相对增益数字是传播保真度最高的（因为它本身就是为传播写的）；
- 良率数字从传闻到标题：WCCFTech 标题（2022-04-18）逐字「Samsung’s 3nm GAA Process Has a Worse Yield Rate Than 4nm」[一手逐字]；观察者网逐字「3nm制程的良率更是只有10%-20%」[一手逐字]——传闻在标题里没有「传闻」字样；
- 「nm 已死」类分析标题：EEJournal（2020-07-23）「No More Nanometers」逐字「Nothing about the “5 nanometer” CMOS process has any real relationship to five actual nanometers」[一手逐字]；PCGamesN（2019-09-10）「TSMC’s 7nm, 5nm, and 3nm ‘are just numbers… it doesn’t matter what the number is’」[一手逐字]；虎嗅（2022-12-15）「芯片制程虚标，纳米成了营销用语？」[一手逐字]——「名号虚标」的讨论从 2019 年起就在主流媒体里，与「3nm 芯片」的正面标题长期并存。
9.5 2024-2026 演化：3nm 让位给 2nm 与埃米
台积电 N2 官方页（curl 200）逐字「TSMC’s 2nm (N2) technology has started volume production in 4Q25 as planned」[一手逐字]；中央社 2025-12-30「台積電宣布2奈米量產」（见上表）；EEJournal《Intel Welcomes You to the Angstrom Era》（2021-11-01，curl 200）逐字「the nanometer process node ruler will have been used for almost a quarter of a century when the angstrom era starts. The Intel angstrom nomenclature allows the company to have process nodes named Intel 18A, Intel 17A, Intel 16A…That sounds so much better than Intel 1.8, Intel 1.7, Intel 1.6…doesn’t it?」[一手逐字]——「埃米时代」的命名逻辑：A=angstrom=0.1nm，18A=1.8nm——名号继续是代号，只是换了个单位继续「比谁的数字小」。
十、反向红跳（对称审计）
反方一：「摩尔定律已死」——不立。 官方反驳句成建制：台积电首篇官方博客《Moore’s Law is not Dead》（2019-08-14，curl 200）逐字「Moore’s Law is not dead, there are many different paths to continue to increase density」[一手逐字]；Philip Wong Hot Chips 31（CNET 转述，curl 200）逐字「”Without any doubt, Moore’s Law is well and alive. It’s not dead, it’s not slowing down, it’s not even sick. It’s well and alive”」[一手逐字]；刘德音（Taipei Times，curl 200）逐字「”To TSMC, Moore’s Law is alive and well”」[一手逐字]；Kevin Zhang 2025（Tom’s Hardware 专访，curl 200）逐字「we see power efficiency [improvements] of about 30% per generation…transistor density aggressively in a ballpark with 20% per generation. So, performance [gains], we are talking about 15%. So those are the numbers I think are consistent with past generations」[一手逐字]；Gelsinger 2021（ZDNet，curl 200）逐字「Is Moore’s Law dead? And the answer is no」＋2022 年对垒黄仁勋（CNBC，curl 200）逐字「Moore’s Law…is ‘alive and well’」vs 黄仁勋逐字「the opportunities for continuing to ride the price performance curve of Moore’s law has ended」[一手逐字]——「已死论」是英伟达一方观点，不是业界共识；摩尔本人晚年（moore.org 讣文，curl 200）逐字「once I made a successful prediction, I avoided making another」[一手逐字]＋2005 年逐字「It will slow down」[一手逐字]——摩尔自己说「会放缓」，没说「已死」。实证账：台积电 1.6X（N3，官方）、M3 25 billion 晶体管（苹果官方）、N2 2025Q4 量产（官方）、密度账 N5→N3 +30%、N3→N2 +15%、A16 +7-10%（Kevin Zhang 专访逐字[一手逐字]）——节奏确实放缓（SemiEngineering 逐字「the cadence for a fully scaled node has extended from 18 months to 2.5 years or longer」[一手逐字]），放缓≠死亡，官方日期账 N7’18→N5’20→N3’22→N2’25（间隔 2/2/3 年）仍在每 2-3 年一代。
反方二：「3nm 是纯营销骗局」——不立（但名号脱钩部分为真）。 脱钩为真：Philip Wong 逐字「Today, these numbers are just numbers. They’re like models in a car」[一手逐字]；EEJournal《Are We Ready for the 2nm Process Node?》（curl 200）逐字「I think the node numbers of today are marketing-based, which means they are essentially meaningless」[一手逐字]。进步为真：台积电官方 1.6X/30-35%（守真锚）、三星官方 45%/23%/16%（守真锚）、独立机构 IBS 逐字「Transistor costs at 3nm are expected to be 20% to 25% higher than at 5nm…Expect 15% more performance and with 25% less power consumption compared to 5nm finFETs」[一手逐字]——成本上升、性能/功耗收益收窄是真的，收益本身也是真的。平衡句（官方自己写）：Philip Wong 逐字「let’s not confuse ourselves with the name of the node with what the technology actually offers」[一手逐字]；SemiEngineering《Intel Vs. Samsung Vs. TSMC》（curl 200）逐字「Put simply, process leadership still has value. Being first to market with a leading-edge process is good for business, but it’s only one piece of a much larger puzzle」[一手逐字]——「名号不真」与「进步不真」是两句话，反方把两句合成了一句。
反方三：「中国已超越台积电」——不立。 中芯做到 7nm 是真的（TechInsights N+1/N+2 拆解，见 7.6），但「超越」不立：TechInsights 2025-06（The Register 转述，curl 200）逐字「SMIC has not yet achieved a 5nm equivalent node that can be produced at scale」[一手逐字]；SemiAnalysis N+3 拆解逐字「SMIC has not overtaken Intel or TSMC…113.4 MTr/mm², slightly above TSMC N6 at 107.7」[一手逐字]；TechInsights 逐字「two to two-and-a-half generations behind」[一手逐字]——「最先进的中国节点」密度追平的是台积电 2020 年的 N6；「突破」叙事（中时逐字「華為已成功突圍」[一手逐字]）与官方口风（华为不公布芯片规格、中芯不置评[一手逐字]）形成对照。
反方四：「英特尔已出局」——不立。 美国商务部 CHIPS 公告（2024-11-26，curl 200）引 Gelsinger 逐字「With Intel 3 already in high-volume production and Intel 18A set to follow next year, leading-edge semiconductors are once again being made on American soil」[一手逐字]；18A 里程碑（2024-06-24）逐字「on track for production in 2025」＋Panther Lake/Clearwater Forest「out of the fab and have powered-on and booted operating systems」[一手逐字]；Panther Lake（2025-10-09）逐字「Panther Lake is already in production, on track to meet customer commitments」[一手逐字]；Q3 2025 财报（2025-10-23，curl 200）逐字「Third-quarter revenue was $13.7 billion, up 3% year-over-year」＋CNBC（curl 200）逐字「Intel snapped a losing streak of six straight quarterly losses and returned to profitability」[一手逐字]；SemiAnalysis 独立结论（VLSI 2025 简报，摘录级[多源检索]）「18A density is likely to be slightly less than N3P, and close to 30% less than N2」——同级竞争互有胜负，而非出局。
反方五（反向的反向）：「半导体停滞无用」——不立。 台积电 N2 2025Q4 如期量产（官方，见 9.5）；三星 Foundry Forum 2023（curl 200）逐字「The company will begin mass production of the 2nm process for mobile applications in 2025, then expand to HPC in 2026 and automotive in 2027」[一手逐字]；英特尔 18A/14A 路线图（SemiEngineering 逐字「All three foundries have announced plans to push well into the angstrom range」[一手逐字]）；全球建厂潮：台积电对美投资 $165 billion（2025-03-04，curl 200）逐字「the largest single foreign direct investment in U.S. history」[一手逐字]＋美国商务部对英特尔 $7.865 billion（2024-11-26，curl 200）[一手逐字]；2024-2026 年 3nm→2nm→埃米的路线图竞赛与「angstrom era」命名讨论（EEJournal 逐字，见 9.5）——领域在扩张，名号在继续，两者同时为真。
十一、母裁决
「3nm 芯片」不是一句假话，也不是一句真话——它是一句没有主语的话。芯片是真的：台积电 N3 用 45 纳米接触栅极间距做出 1.6 倍于 N5 的逻辑密度、功耗降 30-35%，苹果 A17 Pro 是第一颗商用 3nm 级芯片、M3 是 25 billion 晶体管，这些数字全部来自官方文件且经独立拆解交叉验证——工艺进步是这批文件里最硬的东西。名号也是真的：三家官方文件（英特尔 2021 新闻稿「stopped matching the actual gate-length metric in 1997」、台积电 Philip Wong「BMW 5-series or Mazda 6」、IRDS「completely disconnected from reality」）把「节点名不是物理尺寸」写得明明白白——差价不是外人揭发的，是行业自己写下的。 而「3nm 芯片」这句话在传播链里的用法，把这两个「真的」合并成了第三个东西：「全世界最先进的芯片」——这个合并被三家各自的「第一」措辞（三星「world’s first 3nm process」、台积电「most advanced in PPA」、苹果「industry’s first 3-nanometer chip」）分别合法化了一半，而它漏掉的另一半，是「首发≠最先进≠3 纳米」的三年实账：台积电 3nm 收入占比 2023 年只有 6%、三星 3nm 首发客户是矿机芯片公司、英伟达 RTX 50 明确是 4nm 级、Exynos 2500 未进自家旗舰——半导体版的红跳与引力波版的红跳（上篇 NANOGrav，全库第 204 篇）同构：宣布者把每一步限定都印在文件里，传播链只取完成时。与 2016 年 LIGO「We did it!」的对照在这里同样成立：LIGO 的完成时配得上数据（5σ+ 单事件+独立复现），「3nm 芯片」的完成时配不上名号（名号比实物小一个数量级，官方自己承认）——但「配不上名号」不等于「工艺是假的」：名号是档位，进步是进步，两者之间的差价，就是本篇测的东西。
灵魂句：3nm 从来没有指过任何 3 纳米的东西——它一直是一个档位代号；真正发生过的 3 纳米，是它作为「最先进」的代号在传播链里被兑换成的那句完成时。数字是真的，代号也是真的；只是它们没有指向同一个东西。
附：不确定点与待核对
- 「3nm 名号 vs 物理尺寸」的官方承认句：英特尔有官方新闻稿级（2021-07-26）、台积电有高管演讲级（Philip Wong，媒体转述）、三星只有行为证据（SF3→SF2 改名报道，Tom’s Hardware 转 ZDNet）——三星官方承认句登记阴性[多源检索]。
- CPP 口径冲突：WikiChip 第一表 N3 CPP=47nm、第二表 45nm；SemiWiki（IEDM 转述）与 TechInsights（N5−6nm）均为 45nm——正文以 45nm 为准并注明表内不一致（B 捆复核 #1）。
- 官方数字全是「相对前代增益」：台积电 1.6X（vs N5）、三星 45%/23%/16%（vs 自家 5nm）、英特尔 2x（vs Intel 7）——绝对密度（197/150/238 MTr/mm²）全部是 WikiChip/媒体估计值，非官方；正文已区分「官方增益」与「第三方估计」。
- 良率数字一律未确认：三星 3nm 良率 10-20%/perfect/60%/<20% 四种传闻并存，全部「公司未确认」；正文引用任何良率数字都带标注。
- The Register 的「60-70%」：系对官方 1.6X 的讹传（上限读成区间），本篇引作传播失真样本，不引作密度数据。
- SemiEngineering「Big Trouble at 3nm」年份：URL 实为 2018-06-21 文章（任务书预填 2022-12 勘误），正文按 2018 引用；其中 Imec 3nm 级参考尺寸（栅距 42nm/金属节距 21nm）为设计目标非量产数据。
- N3E 双口径：IEDM Late News（1.6X/18%/34%）与 6-K（1.6X/30-35%）为同一工艺的两组口径，正文并表说明。
- 苹果晶体管数口径：A17 19B/A16 16B/A15 15B 为发布会转述（Apple Newsroom 正文未刊载），官方锚点是 M3 的 25B（新闻稿正文）——正文已注明。
- 中芯 5nm 状态时效：截至 2025-06 TechInsights 判定「尚未实现可规模量产的 5nm 等效节点」；2026 年若出现新拆解需更新。
- 观察者网原始域名：正文 JS 壳取不到，用新浪财经转载版（原发观察者网）——引用已注明转载层。
- Gelsinger 引语层级：「alive and well」（2021）为 PCWorld/ZDNet 转述、「18A vs N2」（2023-12）为 wccftech 转 Barron’s——非逐字录音稿，正文已注明媒体转述。
- 「2 年/节点」账：N7’18→N5’20→N3’22→N2’25 为依据官方量产日期的推算（2/2/3 年）；SemiEngineering 权威句为「18 个月→2.5 年以上」——正文用「2-3 年一代」区间。
来源清单
（编号来源，按章序；全部链接在正文中已给出。抓取件与逐字核对脚本存 tmp/3nm-audit/raw/（385 件，含六捆交付文件 rapid_attribution_evidence_A–F.md），可复现。）
- 三星 3GAE 首发新闻稿（2022-06-30）— https://news.samsung.com/global/samsung-begins-chip-production-using-3nm-process-technology-with-gaa-architecture
- 台积电 N3 量产新闻稿（2022-12-29）— https://pr.tsmc.com/english/news/2986 ；SEC 6-K — https://www.sec.gov/Archives/edgar/data/1046179/000156459022039856/tsm-6k_20221229.htm
- 英特尔改名新闻稿（2021-07-26，Wayback 原件）— https://web.archive.org/web/20210730213815id_/https://www.intel.com/content/www/us/en/newsroom/news/intel-accelerates-process-packaging-innovations.html ；SEC 8-K — https://www.intc.com/filings-reports/all-sec-filings/content/0001193125-21-224438/0001193125-21-224438.pdf
- 苹果新闻稿：A17 Pro（2023-09-12）、M3（2023-10-30）、M4（2024-05-07）、A18/A18 Pro（2024-09-09）— https://www.apple.com/newsroom/
- EEJournal《No More Nanometers》（2020-07-23）— https://www.eejournal.com/article/no-more-nanometers/
- IEEE Spectrum《A Better Way to Measure Progress in Semiconductors》（2020-07-21，印刷版「The Node is Nonsense」）— https://spectrum.ieee.org/a-better-way-to-measure-progress-in-semiconductors
- SemiEngineering：《A Node By Any Other Name》（2014）、《5nm Vs. 3nm》（2019）、《Big Trouble At 3nm》（2018）、《Intel Vs. Samsung Vs. TSMC》— https://semiengineering.com/
- WikiChip：「3 nm lithography process」页与 Fuse 报道 — https://en.wikichip.org/wiki/3_nm_lithography_process
- SemiWiki《IEDM 2022 – TSMC 3nm》（Scotten Jones）— https://semiwiki.com/semiconductor-manufacturers/tsmc/322688-iedm-2022-tsmc-3nm/
- TechInsights：《TSMC Reveals 3nm Process Details》《TechInsights Finds SMIC 7nm (N+2) in Huawei Mate 60 Pro》《Huawei Strikes Back》《SMIC N+3 Kirin 9030》— https://www.techinsights.com/blog/
- SemiAnalysis：《Meteor Lake Die Shot》（2022）、《SMIC N+3 Teardown》（2026）— https://newsletter.semianalysis.com/
- IEDM 2022 Archive（台积电 27.1/27.5 摘要）— https://www.ieee-iedm.org/
- IRDS 2022/2024 执行摘要与 More Moore 表 — https://irds.ieee.org/editions/2022
- 台积电财报：4Q23-4Q25 新闻稿（pr.tsmc.com/news/3101/3201/3281）、Management Report、法说会逐字稿 — https://pr.tsmc.com/ 与 https://investor.tsmc.com/
- 三星财报稿（2Q23/3Q23/2Q24）— https://news.samsungsemiconductor.com/
- 英特尔官方：Intel 3 博客（2024-06）、18A 里程碑（2024-06-24）、Panther Lake（2025-10-09）、Q3 2025 财报、18A 页面 — https://newsroom.intel.com/ 与 https://www.intc.com/
- Reuters（Wayback 原件）：三星 3nm（2022-06-30）、台积电 3nm（2022-12-29）、Mate 60 拆解（2023-09-04）— https://www.reuters.com/
- 媒体标题谱系（Wayback id_ 原件）：Bloomberg/The Verge/AnandTech/PCMag/Korea Herald/TechSpot/Straits Times；中文：IT之家/韩联社中文/中央社/观察者网（新浪转载）/BBC 中文/中时/联合早报 — 链接与时间戳见第九章与 E 捆清单
- 台积电官方博客《Moore’s Law is not Dead》（2019-08-14）— https://www.tsmc.com/english/news-events/blog-article-20190814
- 刘德音 SEMICON Taiwan（Taipei Times，2019-09-18）、Kevin Zhang 专访（Tom’s Hardware，2025-06）、Gelsinger 2021/2022（PCWorld/ZDNet/CNBC）、摩尔讣文（moore.org）
- 良率传闻链：wccftech（2022-04）、KED Global（2023-01）、The Register（2023-07）、Korea Herald（2024-08）、TrendForce（2024-10）
- 联发科天玑 9400 新闻稿（2024-10-09）、高通骁龙 8 Elite 产品简报、英伟达 RTX Blackwell 白皮书 — 各官方 200
- 中芯账：TechInsights N+1/N+2/N+3 三篇、Reuters 2023-09、SemiAnalysis 2026、AEI《The Lithography Loophole》（摘录级）
- 美国商务部 CHIPS 公告（govdelivery，2024-11-26）、台积电对美投资 165B（pr.tsmc.com/news/3210，2025-03-04）
- 中文语境：OFweek（2023-09-19）、新浪财经（2026-05-10）、虎嗅（2022-12-15）、IT之家（2022-08-02）、中文维基「芯片制程技术节点」